Image:CPU block diagram.svg

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CPU_block_diagram.svg‎ (260 × 360 pixel, file size: 10 KB, MIME type: image/svg+xml)

This vector image was converted from the original raster version: Image:CPU block diagram.png

Summary

Block diagram of a hypothetical simple CPU, showing instruction fetch, decode, data registers, ALU, and memory interface, and major relationships.

Contributors

  • PNG author: R. S. Shaw
  • SVG conversion by: Booyabazooka

Licensing

GFDL

I, the creator of this work, hereby grant the permission to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
Subject to disclaimers.

File history

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  • (del) (cur) 03:48, 12 April 2007 . . R. S. Shaw ( Talk | contribs) . . 260×360 (10,716 bytes) (Revision removing rounded corners from ALU)
  • (del) (rev) 03:52, 1 June 2006 . . Booyabazooka ( Talk | contribs) . . 260×360 (12,541 bytes) (:''This vector image was converted from the original raster version: Image:CPU block diagram.png'' ==Summary== Block diagram of a hypothetical simple CPU, showing instruction fetch, decode, data registers, ALU, and memory interface, and major relati)

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